Accelerating Application-specific Energy-related Algorithms with High Performance Computing graphic cards
Mentor: Javier Castillo Villar
Email: javier.castillo@urjc.es
Phone: (+34) 916647498
University: Universidad Rey Juan Carlos
Partner Host Institution: N.A.
Keywords: Smart energy management systems, compressive sampling, Smart Grid, Security, Big data, High Performance Computing

Accelerating Application-specific Energy-related Algorithms with High Performance Computing graphic cards

In different research areas in the Energy Sector there are problems to solve that many times involve complex algorithms. Some of these algorithms can benefit from the fact that there can be a great reduction in their processing times when using the High Performance computing power of GPUS (Graphic Proccessing Units).
This RL will be in charge of designing tailored-made implementations of algorithms that can be very challenging, for example, in the field of detection of fraud leaks from the energy lines, prevention of damages related with weather conditions, and so on.

Departament: Computing Science, Computer Architecture, Programming Languages and Systems and Statistics and Operative Investigation
Research Group: GDHwSw
More Information:
Relevants projects on the area: Project name: Context & Inteligence, Sponsor: Ministerio de economía y competitividad, Ref: IPT-2012-0912-4300000, Duration: 01/05/2012 – 31/12/2014, Main Researcher: David Ríos
Relevants publications on the area: 1.- C. Pedraza; J. Castillo; J.I Martínez Torre, P. Huerta; J. L. Bosque, J. Cano, Genetic Algorithm for Boolean Minimization in a FPGA Cluster, Journal of Supercomputing, Num , Vol: 2, 58, Pag: 244-252, Fecha: 2011, ISSN: 0920-8542, DOI: 10.1007/s11227-010-0401-7, JCR 2011: 0.578
2.- C. Pedraza; E. Castillo, J. Castillo; J. L.Bosque, J.I. Martinez Torre, O. D. Robles, J. Cano, P.Huerta, Content-based Image Retrieval algorithm Acceleration in a Low-cost Reconfigurable FPGA Cluster, Num , Vol: 11, 56, Pag: 633-640, Fecha: 2010, Journal of Systems Architecture (Embedded Software Design), ISSN: 1383-7621, DOI: 10.1016/j.sysarc.2010.07.017, JCR 2008: 0.667