Low power System-on-chip – Novel Design Techniques
Mentor: Alfredo Gardel Vicente
Email: alfredo.gardel@uah.es
Phone: (+34) 918856585
University: Universidad de Alcalá
Partner Host Institution: OptivaMedia
Keywords: wearable sensors positioning smart buildings energy efficiency IoT network edge-devices

Low power System-on-chip – Novel Design Techniques

This research topic addresses the configuration and study of low power system-on-chip (SoC) used in embedded systems where the autonomy is a key factor of success for the validity of any commercial project. We have experience in the research of FPGAs and system on chip modules based on Xilinx Zynq, We foresee a project where the researcher works in the simulation of programable devices together with tests to monitor power consumption in an emulated environment. The project might provide a common framework to compare the power consumption of embedded system and offering end-users with debugging capabilities to know where to put the efforts while designing for a low-power programable system on a SoC module.

Departament: Electronics
Research Group: Electronic Engineering Group Applied to Intelligent Spaces and Transportation
More Information: http://www.geintra-uah.org/
https://portal.uah.es/portal/page/portal/epd2_profesores/prof121217
Relevants projects on the area: Title: Design Of Digital Systems And Electronic Design On Hw Reconfigurable Contract: Lou-Art 83: Indra Sa. (71/2013) Duration, From: 09/16/2013 To: 12/15/2013 Principal Investigator: Dr. A. Gardel, Dr. Jl Lázaro, Dr. I. Bravo Participation: Principal Investigator Total Contract Amount: 27,830 Euros
Relevants publications on the area: 1.- "PARAMETRIC DENSE STEREOVISION IMPLEMENTATION ON A SYSTEM-ON CHIP (SOC)" AUTORES: A. GARDEL; P. MONTEJO; J. GARCIA; I. BRAVO; J.L. LÁZARO Sensors, ISSN: 1424-8220, 2012, vol 12 - 2 https://www.ncbi.nlm.nih.gov/pubmed/22438742
2.- "FPGA and SoC Devices Applied to New Trends in Image/Video and Signal Processing Fields" AUTORES: I. Bravo-, J.L. Lázaro-, Alfredo Gardel-Vicente Sensors, 2017 https://www.mdpi.com/2079-9292/6/2/25/pdf
3.- "A NEW APPROACH TO EVALUATING INTERNAL XILINX FPGA RESOURCES" AUTORES : I. BRAVO; A. GARDEL; B. PÉREZ J.L. LÁZARO; J. GARCÍA; D. SALIDO; JOURNAL OF SYSTEMS ARCHITECTURE (JSA), 2011 ELSEVIER - ISSN: 1383-7621 https://www.sciencedirect.com/science/article/pii/S1383762111000774